Improving IBIS-AMI Model Accuracy

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Abstract

As serial data link speed continues to increase and SerDes architecture becomes more complex, the IBIS Algorithmic Modeling Interface (IBIS-AMI) has become popular among system developers and SerDes vendors. To accurately and quickly predict highspeed link performance at a bit error rate (BER) of 1E-12 or lower, IBIS-AMI models need to accurately represent chip performance and be validated at certain levels. Two methods have been widely used to validate an IBIS-AMI model. The first method, model-to-model correlation, is used if the SerDes vendor already has an existing in-house models built on a certain computing platform (Matlab, C/C++, Python, etc.) and validated to be accurate. The second method, model-to-lab correlation, compares model simulation results to data acquired in lab testing. This paper presents case studies for both methods and compares favorable and unfavorable factors for both methods. 10G, 11.5G and 23G SerDes data are used as examples.

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Improving IBIS-AMI Model Accuracy

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